1. Field of the Invention
This invention relates generally to a capacitor plate to provide decoupling capacitance for a substrate with integrated circuit (IC) components, and more specifically relates to a capacitor plate for a printed circuit board assembled with one or more land grid array (LGA) or ball grid array (BGA) IC components.
2. Description of the Prior Art
In many data processing systems (e.g., computer systems, programmable electronic systems, telecommunication switching systems, control systems, and so forth) very large pin count electrical components (e.g., application specific integrated circuits and processor chips) are assembled on substrates (e.g., printed circuit boards, other flexible substrates, multi-chip modules, and equivalents). One type of packaging that is frequently used for a very large pin count electrical component is what is commonly known as a LGA component. Electrical connections between the LGA component pins and the corresponding conductive pads on the substrate are frequently achieved by compressing an elastomeric insulating material containing several perpendicular conductive channels (e.g., vias filled with conductive balls or conductive threads). In order to achieve reliable electrical connection between the pins and the pads, these LGA components are typically clamped by metal brackets and bolts to the substrate. BGA components are soldered to the substrate, and do not need clamping.
As the operating frequencies of LGA components, BGA components, and other IC components increase, switching current transients can cause voltage fluctuations on the power and ground lines, and produce switching noise on the power and ground lines seen by the IC components. Decoupling capacitance is typically provided on the substrate to reduce these voltage fluctuations on the power and ground lines. Ideally, the decoupling capacitance is distributed among the IC components, as close to the IC components as possible.
One method to add distributed capacitance to a substrate is by adding a thin-core dielectric material to the substrate. However, this dielectric material is usually limited to a couple of layers, and the cost of a large substrate (e.g., a PCB) increases dramatically because the entire substrate has the extra dielectric layers. Furthermore, each power layer added to a substrate reduces the number of signal layers available for signal routing between components on the substrate.
Another method that is more common is the attachment of decoupling capacitors 112 on the substrate 104 outside the footprint perimeter of an IC component 106. FIG. 1 illustrates decoupling capacitors 112 assembled on a printed circuit board (PCB) 104, outside the perimeter of a LGA or BGA component 106 assembled on the PCB 104. A LGA component 106 is electrically connected to the substrate 104 through the substrate electrical contact area 108 and an interposer (e.g., a socket, an elastomeric pad with conductive vias, or an equivalent connector) 110. Alternatively, a BGA component (not shown) is soldered to the substrate 104. The substrate 104 also has a substrate electrical contact area 102 that is normally used for In-Circuit Testing (ICT) of the assembled substrate.
However, attaching capacitors to a substrate outside the footprint perimeter of IC components increases the inductance that is seen by the IC component pins, and reduces the filtering of high frequency noise on the power and ground lines of the substrate seen by the IC component. Without an improved decoupling capacitance with a relatively low inductance, discrete decoupling capacitors with relatively high inductance will limit the effectiveness of the decoupling capacitance on substrates as the IC component operating frequencies increase, possibly resulting in operational failures and reduced reliability for the IC components and the substrate.
It would be desirable to provide an improved capacitance that can supply the necessary decoupling capacitance, and minimize the fluctuations in voltage levels seen by an IC component on the substrate.